Many commonly used data storage devices, such as Solid State Drives (SSDs), are based on flash memory, a type of Non-Volatile Random Access Memory (NVRAM) capable of storing data even if the power to the device is switched off. A memory cell within a flash array is typically a floating gate field-effect transistor that holds a charge to indicate stored data. In Single-Level Cell (SLC) flash, the charge indicates one of two possible states (“1” or “0”) such that a single memory cell stores one bit of data. By contrast, Multi-Level Cell (MLC) flash uses additional charge states (e.g., “00”, “01”, “10”, or “11”) to enable a single memory cell to store two bits of data or more. The storage capacity in MLC flash may therefore be twice (or more) than that achieved in SLC flash using the same number of transistors, though there may be other tradeoff considerations such as latency and lifespan of the memory cells.
MLC flash writes may be performed in two steps, where a lower page is programmed first similar to an SLC flash write (i.e., “1” or “0”) and then an upper page is programmed later to tune the cell voltage (i.e., from “1” to “10” or “11” or from “0” to “00” or “01”) to indicate the second bit of the memory cell. This two-step programming sequence prevents cell-to-cell interference which can corrupt bit values in neighboring cells. However, if power is unexpectedly lost in an MLC flash memory device during an upper page program operation to a memory cell, data which has been previously written to the lower page of that memory cell may become corrupted. The user is therefore at a risk of losing not only data which is in-flight at the time of the power loss event, but also data which was already successfully written in flash memory which a user typically expects to be safe regardless of any loss of power to the device.